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88PG8237, 88PG8227, 88PG8226, 88PG8216, 88PG8204
Field Programmable DSP SwitcherTM Family
1MHz, Dual Step-down Regulator with AnyVoltageTM Technology
Datasheet
Doc. No. MV-S103563-00, Rev. C April 23, 2008 Marvell. Moving Forward Faster
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88PG82XX Datasheet
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Doc Status: 2.00 Technical Publication: 0.xx
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Disclaimer No part of this document may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying and recording, for any purpose, without the express written permission of Marvell. Marvell retains the right to make changes to this document at any time, without notice. Marvell makes no warranty of any kind, expressed or implied, with regard to any information contained in this document, including, but not limited to, the implied warranties of merchantability or fitness for any particular purpose. Further, Marvell does not warrant the accuracy or completeness of the information, text, graphics, or other items contained within this document. Marvell products are not designed for use in life-support equipment or applications that would cause a life-threatening situation if any such products failed. Do not use Marvell products in these types of equipment or applications. With respect to the products described herein, the user or recipient, in the absence of appropriate U.S. government authorization, agrees: 1) Not to re-export or release any such information consisting of technology, software or source code controlled for national security reasons by the U.S. Export Control Regulations ("EAR"), to a national of EAR Country Groups D:1 or E:2; 2) Not to export the direct product of such technology or such software, to EAR Country Groups D:1 or E:2, if such technology or software and direct products thereof are controlled for national security reasons by the EAR; and, 3) In the case of technology controlled for national security reasons under the EAR where the direct product of the technology is a complete plant or component of a plant, not to export to EAR Country Groups D:1 or E:2 the direct product of the plant or major component thereof, if such direct product is controlled for national security reasons by the EAR, or is subject to controls under the U.S. Munitions List ("USML"). At all times hereunder, the recipient of any such information agrees that they shall be deemed to have manually signed this document in connection with their receipt of any such information. Copyright (c) 2008. Marvell International Ltd. All rights reserved. Marvell, the Marvell logo, Moving Forward Faster, Alaska, Fastwriter, Datacom Systems on Silicon, Libertas, Link Street, NetGX, PHYAdvantage, Prestera, Raising The Technology Bar, The Technology Within, Virtual Cable Tester, and Yukon are registered trademarks of Marvell. Ants, AnyVoltage, Discovery, DSP Switcher, Feroceon, GalNet, GalTis, Horizon, Marvell Makes It All Possible, RADLAN, UniMAC, and VCT are trademarks of Marvell. All other trademarks are the property of their respective owners.
Doc. No. MV-S103563-00 Rev. C Page 2 Document Classification: Proprietary Information
Copyright (c) 2008 Marvell April 23, 2008, 2.00
88PG82XX
Field Programmable DSP SwitcherTM Family
Datasheet
PRODUCT OVERVIEW
The 88PG82XX family integrates the dual synchronous Step-Down (Buck) switching regulators housed in a 3 X 4mm QFN-20 package. Internally self-compensated, the step-down regulator requires no external compensation and works with low-ESR output capacitors to simplify the design, minimize the board space, and reduce the amount of external components. The switching frequency for the step-down regulator is 1MHz, allowing the use of low profile surface mount inductors and low value capacitors. Each step-down regulator includes programmable output voltage to allow the user to easily set the output voltage with external resistors, logic control, or serial data interface. The output voltage range is 0.72V to 3.63V. The 88PG82XX family operates from an input voltage range of 2.75V to 5.5V, making the device well suited for portable applications. Other key features of the 88PG82XX family include soft start, an internal current limit, an under-voltage lockout, thermal shutdown, over voltage protection, and power-on-reset signals. Dual switching regulators 1MHz switching frequency Low quiescent current of 2.1 mA (typ.) Stable with low-ESR ceramic output capacitors No external compensation required Up to 95% efficiency Input voltage range: 2.75V to 5.5V Programmable output voltage range: 0.72V to 3.63V Serial / Logic Programmability Any VoltageTM Technology provides 64 output voltage selections to provide up most flexibility Built-in undervoltage lockout Over voltage protection Thermal shutdown protection Output short circuit protection Output voltage margining capability Lead-free packages
Applications
Portable and handheld computing Point-of-load power supplies DSP power supplies Disk drive power supplies
Features
Tiny 3 X 4 mm QFN-20 package
Figure 1: Typical Application Circuit: Output 1.8V/1.5A and 1.2V/1.5A
R1 C1 0.1uF R4 100k R3 100k R2 100k 4 11 16 6 1 13 12 14 15 R7 160k R8 0 R5 51k R6 0 10 ohm 3 17 SVIN PVIN2 SGND POR1 POR2 SDI PGND1 EN SW2 VSET1 SW2 PSET1 VSET2 PSET2 SFB2 PGND2 2 22uF/6.3V 19 C2 10 PVIN1 SW1 SW1 7 L1 9 3.3uH 5 22uF/6.3V 8 18 L2 20 3.3uH C4 C3 22uF/6.3V C5
Vin 2.75V - 5.5V
22uF/6.3V
POR 1 POR 2 SDI EN
Vout1 2.5V/1.5A
88PG8226
SFB1
Vout2 1.5V/1.5A
Copyright (c) 2008 Marvell April 23, 2008, 2.00 Document Classification: Proprietary Information
Doc. No. MV-S103563-00 Rev. C Page 3
88PG82XX Datasheet
Caution: This is a very high frequency device, proper PCB layout is required. Refer to page 47 for further details.
:
Table 1:
DC Loading Current Ratings
Buck 2
Buck 1 0 .7 5 A 1 .0 A 1 .5 A 2 .0 A
0.75A 88PG8204
1
1.0A 88PG8205 88PG8215 88PG8225 88PG8235
1 .5 A 88PG8206 88PG8216
1
2 .0 A 88PG8207 88PG8217 88PG82271 88PG82371
88PG8214 88PG8224 88PG8234
88PG82261 88PG8236
1. The part numbers in Bold are released to production. The other parts are available upon request. Contact Marvell(R) marketing for availability.
The devices shown in Table 1 have the same input and output voltage range for step-down registers.
Doc. No. MV-S103563-00 Rev. C Page 4 Document Classification: Proprietary Information
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Table of Contents
Table of Contents
Product Overview ....................................................................................................................................... 3 Table of Contents ....................................................................................................................................... 5 List of Tables .............................................................................................................................................. 7 List of Figures............................................................................................................................................. 9 1
1.1 1.2
Signal Description ....................................................................................................................... 11
Pin Configuration.............................................................................................................................................11 Pin Description ................................................................................................................................................12 1.2.1 Pin Types ..........................................................................................................................................12
2
2.1 2.2 2.3 2.4
Electrical Specifications ............................................................................................................. 15
Absolute Maximum Ratings ............................................................................................................................15 Recommended Operating Conditions .............................................................................................................15 Electrical Characteristics .................................................................................................................................16 Switching Step-down Regulator ......................................................................................................................17
3
3.1 3.2
Functional Description................................................................................................................ 19
Regulation and Start-up ..................................................................................................................................19 3.1.1 Soft Start and Sequencing ................................................................................................................20 Output Voltage Settings ..................................................................................................................................22 3.2.1 Logic Programmability ......................................................................................................................22 3.2.2 Serial Programmability......................................................................................................................23 3.2.3 Output Voltage - AnyVoltageTM Technology ....................................................................................25 Undervoltage Lockout (UVLO) ........................................................................................................................28 Over Voltage Protection (OVP) .......................................................................................................................28 Power-On Reset (POR) ..................................................................................................................................28 Thermal Shutdown ..........................................................................................................................................29 Adaptive Transient Response .........................................................................................................................29
3.3 3.4 3.5 3.6 3.7
4
4.1 4.2 4.3 4.4
Functional Characteristics ......................................................................................................... 31
Start-Up Waveforms........................................................................................................................................31 Short-Circuit Waveforms .................................................................................................................................32 Switching Waveforms......................................................................................................................................33 Load Transient Waveforms .............................................................................................................................34 4.4.1 Step-Down Regulator .......................................................................................................................34 4.4.2 Cross-Talk Waveforms .....................................................................................................................36 Output Voltage Transient Waveforms .............................................................................................................37 4.5.1 Step-Down Regulator .......................................................................................................................37
4.5
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88PG82XX Datasheet
4.6
Line Transient Waveforms ..............................................................................................................................38
5
5.1 5.2 5.3 5.4 5.5 5.6 5.7
Typical Characteristics ............................................................................................................... 39
Efficiency Graphs ............................................................................................................................................39 5.1.1 Efficiency Graphs in Log Scale .........................................................................................................39 Load Regulation ..............................................................................................................................................40 Dropout Voltage ..............................................................................................................................................40 RDS (ON) Resistance .....................................................................................................................................40 IC Case and Inductor Temperature.................................................................................................................41 Input Voltage Graphs ......................................................................................................................................43 5.6.1 Step-Down Regulator .......................................................................................................................44 Temperature Graphs .......................................................................................................................................45 5.7.1 Step-Down regulator .........................................................................................................................46
6
6.1
Applications Information ............................................................................................................ 47
PC Board Layout Considerations and Guidelines ...........................................................................................47 6.1.1 PC Board Layout Examples for 88PG82XX .....................................................................................50 6.1.2 Bill of Materials (BOM) ......................................................................................................................52
7
7.1 7.2 7.3
Mechanical Drawing .................................................................................................................... 55
88PG82XX Mechanical Drawing .....................................................................................................................55 Dimensions .....................................................................................................................................................56 Typical Pad Layout Dimensions ......................................................................................................................57 7.3.1 Recommeded Solder Pad Layout .....................................................................................................57
8
8.1 8.2 8.3
Ordering Information................................................................................................................... 59
Ordering Part Numbers and Package Markings..............................................................................................59 Sample Ordering Part Number........................................................................................................................59 Package Marking ............................................................................................................................................60 8.3.1 88PG82XX Package Marking and Pin 1 Locations ..........................................................................60
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Copyright (c) 2008 Marvell April 23, 2008, 2.00
List of Tables
List of Tables
Table 1: DC Loading Current Ratings...............................................................................................................4
1
Signal Description ............................................................................................................................ 11
Table 2: Table 3: Pin Type Definitions ..........................................................................................................................12 Pin Descriptions ................................................................................................................................12
2
Electrical Specifications .................................................................................................................. 15
Table 4: Table 5: Table 6: Table 7: Absolute Maximum Ratings ..............................................................................................................15 Recommended Operating Conditions...............................................................................................15 Electrical Characteristics Table ........................................................................................................16 Switching Step-down Regulator Table..............................................................................................17
3
Functional Description..................................................................................................................... 19
Table 8: Table 9: Table 10: Table 11: Table 12: Table 13: Table 14: Logic Programmability Table ............................................................................................................22 Default Value of Data Field ...............................................................................................................24 Voltage and Percentage Set .............................................................................................................24 Output Voltage Selection ..................................................................................................................24 AnyVoltageTM Programming Table for 1% Resistors ........................................................................25 AnyVoltageTM Programming Table for 5% Resistors ........................................................................26 Output Voltage Option Steps ............................................................................................................27
4 5 6
Functional Characteristics............................................................................................................... 31 Typical Characteristics .................................................................................................................... 39 Applications Information ................................................................................................................. 47
Table 15: Table 16: BOM for 88PG82XX .........................................................................................................................52 Ceramic Capacitor Cross Reference ................................................................................................54
7 8 A
Mechanical Drawing ......................................................................................................................... 55
Table 17: Package Dimensions ........................................................................................................................56
Ordering Information........................................................................................................................ 59
Table 18: 88PG82XX Ordering Part Numbers..................................................................................................59
Revision History ............................................................................................................................... 61
Table 19: Revision History ................................................................................................................................61
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88PG82XX Datasheet
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List of Figures
List of Figures
Figure 1: Typical Application Circuit: Output 1.8V/1.5A and 1.2V/1.5A .............................................................3
1
Signal Description ........................................................................................................................... 11
Figure 2: 88PG82XX Family 3X4mm QFN-20 Package--Top View................................................................11
2 3
Electrical Specifications ................................................................................................................. 15 Functional Description.................................................................................................................... 19
Figure 3: Figure 4: Figure 5: Figure 6: Figure 7: Figure 8: Figure 9: Figure 10: Figure 11: Figure 12: Figure 13: Figure 14: Figure 15: 88PG82XX Block Diagram ...............................................................................................................19 Output Voltage Window ....................................................................................................................20 Startup without Sequencing ..............................................................................................................20 Startup with Sequencing and Soft Start (COUT= 22 F) ...................................................................20 Fast Startup (0.8V, 1.2V, 1.8V, 2.5V, 3.3V) .................................................................................21 Soft Start up (0.8V, 1.2V, 1.8V, 2.5V, 3.3V) .....................................................................................21 Inrush Current with COUT = 100 F ..................................................................................................21 Serial Programmability......................................................................................................................23 Startup Sequence ............................................................................................................................27 VSET = 2.5V and PSET = -5% .........................................................................................................27 UVLO and OVP Waveforms .............................................................................................................28 Power-On Reset Waveforms ............................................................................................................28 Adaptive Transient Response ..........................................................................................................29
4
Functional Characteristics.............................................................................................................. 31
Figure 16: Figure 17: Figure 18: Figure 19: Figure 20: Figure 21: Figure 22: Figure 23: Figure 24: Figure 25: Figure 26: Figure 27: Figure 28: Figure 29: Figure 30: Figure 31: Figure 32: Figure 33: Startup Using the Enable Pin ...........................................................................................................31 Turn Off Using the Enable Pin ..........................................................................................................31 Startup Sequence ............................................................................................................................31 Hot Plug ............................................................................................................................................31 UVLO and OVP Thresholds..............................................................................................................32 Input Soft Start and Start up Sequence ............................................................................................32 Step-Down Short-Circuit Response .................................................................................................32 Switching Waveforms - PWM mode ................................................................................................33 Switching Waveforms - PWM mode .................................................................................................33 Switching Waveforms - DCM Mode .................................................................................................33 Switching Waveforms - DCM Mode-Zoom........................................................................................33 PWM Output Ripple Voltage ............................................................................................................34 Fast Load Rise Time ........................................................................................................................34 Slow Load Rise Time ........................................................................................................................34 Fast Load Fall Time .........................................................................................................................35 Slow Load Fall Time .........................................................................................................................35 Load Transient Response ................................................................................................................35 Double-Pulsed Load Response ........................................................................................................35
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Doc. No. MV-S103563-00 Rev. C Page 9
88PG82XX Datasheet
Figure 34: Figure 35: Figure 36: Figure 37: Figure 38: Figure 39: Figure 40: Figure 41: Figure 42: Figure 43: Figure 44: Figure 45:
Load Transient Response ................................................................................................................36 Double-Pulsed Load Response ........................................................................................................36 Cross-talk Continuous Mode ...........................................................................................................36 Cross-talk Discontinuous Mode ........................................................................................................36 VOUT = 1.0V to 1.2V with No Load ...................................................................................................37 VOUT = 1.0V to 1.5V with No Load....................................................................................................37 VOUT = 1.0V to 1.2V with ILOAD = 1.5A.............................................................................................37 VOUT = 1.0V to 1.5V with ILOAD = 1.5A.............................................................................................37 VOUT = 1.2V to 1.0V with ILOAD = 1.5A.............................................................................................38 VOUT = 1.5V to 1.0V with ILOAD = 1.5A.............................................................................................38 Line Transient @ VIN = 3.6V.............................................................................................................38 Line Transient @ VIN = 4.5V.............................................................................................................38
5 6
Typical Characteristics ................................................................................................................... 39 Applications Information ................................................................................................................ 47
Figure 46: Figure 47: Figure 48: Figure 49: Simpified Schematic .........................................................................................................................48 PC Board Schematic ........................................................................................................................49 Top Silk-Screen, Top Traces, Vias, and Top Copper (Not to Scales) ..............................................50 Bottom Silk Screen, Bottom Trace, Vias, and Bottom Copper (Not to Scale)...................................51
7 8
Mechanical Drawing ........................................................................................................................ 55 Ordering Information....................................................................................................................... 59
Figure 50: Figure 51: Sample Part Number ........................................................................................................................59 88PG8227 Package Marking and Pin 1 Location .............................................................................60
A
Revision History ............................................................................................................................... 61
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Signal Description
Pin Configuration
1
1.1
Signal Description
Pin Configuration
Figure 2: 88PG82XX Family 3X4mm QFN-20 Package--Top View
SW2 20
PGND2 19
SW2 18
PVIN2 17
EN
1
16
POR 2
SFB2
2
15
PSET 2
SVIN
3
14
VSET 2
SGND
4
13
VSET 1
SFB1
5
12
PSET 1
SDI/ ENSEQ
6
11
POR1
7
8
9
10
SW1
PGND1
SW1
PVIN1
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88PG82XX Datasheet
1.2
1.2.1
Table 2:
Pi n Typ e I O S NC GND
Pin Description
Pin Types
Pin Type Definitions
D e f in it io n Input Only Output Only Supply Not Connected Ground
Table 3 provides pin descriptions for the 88PG82XX.
Table 3:
Pi n # 1
Pin Descriptions
P in N a m e EN Pi n Typ e I P i n D es c r ip t i o n Enable. Logic high (> 2.0V) enables both switching regulators. Logic low (<0.8V) disables the regulators. When disabled, the switch nodes SW1 and SW2 are Hi-Z. The feedback nodes SFB1 and SFB2 are pulled down by 20K resistors, and the power on reset nodes POR1 and POR2 are pulled down by internal open drain NFETs. The low signal has to be at least 20 s to disable both regulators. If this pin is left floating, an internal 10 A current source pulls this pin high to SVIN, enabling the regulator. Switching Regulator Feedback. Senses the output voltage of the switching regulator 2. Signal Input Voltage. The input voltage is 2.75V to 5.5V for internal circuitry. Connect a 0.1 F decoupling capacitor between SVIN and SGND and position it as close as possible to the IC. Ground. Connect to a ground plane. Switching Regulator Feedback. Senses the output voltage of the switching regulator 1.
2 3
SFB2 SVIN
I S
4 5
SGND SFB1
GND I
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Signal Description
Pin Description
Table 3:
Pi n # 6
Pin Descriptions
P in N a m e SDI/ENSEQ Pi n Typ e I P i n D es c r ip t i o n Multi-purpose logic input. Logic high (> 2.0V) enables soft start and sequence. Buck 1 starts followed by Buck 2, once VOUT1 is within a specified tolerance. The soft start rise time is typically 5 ms and is dependent on output, but independent of capacitance and load current. If a short circuit is detected on Buck1, then Buck 2 will be disabled. Logic low (< 0.8V) disables the start up sequence. Buck 1 and Buck 2 will start up together without any soft start. Serial Data Input. The input data into this pin is used to program the output voltage (See "Output Voltage Settings" on page 22). The power-good signal has to be high before the serial data interface can be used. To implement soft start a 10K pull-up resistor must be connected to SVIN. This pin is internally pulled down by a 10 A current source.
7, 9 8
SW1 PGND1
O GND
Switch Node for regulator 1. Internal power MOSFET drain. Connects to an external inductor. Power Ground. The power ground must be connected to the negative terminal of the input and output capacitors. Power Input Voltage. Internal power MOSFET source. Connect the 10F decoupling capacitor between PVIN and PGND and position it as close as possible to the IC. NOTE: PVIN and PVIN2 must be connected together and should not be separated. Power-On Reset 1. This pin is an open drain output to indicate the status of the output voltage. The output pin goes high 40 ms after the output voltage is within the specified tolerance. POR2 and POR1 can be connected to the same external pull-up resistor to indicate "both outputs good". Percent Set for Regulator 1. 1. Resistor Programming: Connect an external resistor to ground to set the output voltage of the switching regulator. See the "Electrical Characteristics" for resistor values and Output Voltage Settings. Use resistor values with a tolerance of 5% or better. The total capacitance across this pin and GND should be equal to 25 pF or less. If the pin is not used, it must be connected to GND. 2. Logic Programming: Four output voltage levels (1.8V, 2.5V, 3.0V, 3.3V) can be set by connecting the VSET and PSET pins to either GND or SVIN. Voltage Set for Regulator 1. 1. Resistor Programming: Connect an external resistor to ground to set the output voltage of the switching regulator. See the "Electrical Characteristics" for resistor values and Output Voltage Settings. Use resistor values with a tolerance of 5% or better. The total capacitance across this pin and GND should be equal to 25 pF or less. 2. Logic Programming: Four output voltage levels (1.8V, 2.5V, 3.0V, 3.3V) can be set by connecting the VSET and PSET pins to either GND or SVIN.
10
PVIN1
S
11
POR1
O
12
PSET1
I
13
VSET1
I
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Doc. No. MV-S103563-00 Rev. C Page 13
88PG82XX Datasheet
Table 3:
Pi n # 14
Pin Descriptions
P in N a m e VSET2 Pi n Typ e I P i n D es c r ip t i o n Voltage Set for Regulator 2. 1. Resistor Programming: Connect an external resistor to ground to set the output voltage of the switching regulator. See the "Electrical Characteristics" for resistor values and Output Voltage Settings. Use resistor values with a tolerance of 5% or better. The total capacitance across this pin and GND should be equal to 25 pF or less. 2. Logic Programming: Four output voltage levels (0.8V, 1.0V, 1.2V, and 1.5V) can be set by connecting the VSET and PSET pins to either GND or SVIN. Percent Set for Regulator 2. 1. Resistor Programming: Connect an external resistor to ground to set the output voltage of the switching regulator. See the "Electrical Characteristics" for resistor values and Output Voltage Settings. Use resistor values with a tolerance of 5% or better. The total capacitance across this pin and GND should be equal to 25 pF or less. If the pin is not used, it must be connected to GND. 2. Logic Programming: Four output voltage levels (0.8V, 1.0V, 1.2V, and 1.5V) can be set by connecting the VSET and PSET pins to either GND or SVIN. Power-On Reset 2. This pin is an open drain output to indicate the status of the output voltage. The output pin goes high 40 ms after the output voltage is within the specified tolerance. POR2 and POR1 can be connected to the same external pull up resistor to indicate "both output good". Power Input Voltage for regulator 2: Internal power MOSFET source. Connect the 10 F decoupling capacitor between PVIN2 and PGND2 and position it as close as possible to the IC. NOTE: PVIN and PVIN2 must be connected together and should not be separated. Power Ground for regulator 2: The power ground must be connected to the negative terminal of the input and output capacitors. Switch Node for regulator 2: Internal power MOSFET drain. Connects to an external inductor.
15
PSET2
I
16
POR2
O
17
PVIN2
S
19 18, 20
PGND2 SW2
GND O
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Electrical Specifications
Absolute Maximum Ratings
2
2.1
Table 4:
Parameter
Electrical Specifications
Absolute Maximum Ratings
Absolute Maximum Ratings1
S y m bo l SVIN PVIN1, PVIN2 VSW1, VSW2 VSFB1, VSFB2 VVSET1, VVSET2 VPSET1, VPSET2 VEN VPOR VSDI
3
R a ng e -0.3 to 6.0 -0.3 to 6.0 -0.6 to (SVIN +0.3) -0.6 to (SVIN +0.3) -0.6 to (SVIN +0.3) -0.6 to (SVIN +0.3) -0.6 to (SVIN +0.3) -0.6 to (SVIN +0.3) -0.6 to (SVIN +0.3) -40 to 85 125 -65 to 150 2
U n i ts V V V V V V V V V C C C kV
Signal Input Voltage Power Input Voltage Switch Voltage
2
Switching Regulator Feedback Voltage Voltage Set Percentage Set Voltage Enable POR Voltage SDI Voltage Operating Temperature Range
TOP TJMAX TSTOR
Maximum Junction Temperature Storage Temperature Range ESD Rating
4
1. Exceeding the absolute maximum rating may damage the device 2. -10V to (VIN +0.3)V for less than 50s 3. Specifications over the -40C to 85C operating temperature ranges are assured by design, characterization and correction with statistical process controls 4. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF
2.2
Table 5:
Parameter
Recommended Operating Conditions
Recommended Operating Conditions1
S y m bo l SVIN PVIN1, PVIN2 JA JC r a n ge 2.75 to 5.5 2.75 to 5.5 70 19 U ni ts V V C/W C/W
Single Input Voltage Power Input Voltage Package Thermal Resistance2
1. This device is not gauranteed to function outside the specified operating range 2. Test on 4-layer (JESD51-7) and vias (JESD51-5) board
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Doc. No. MV-S103563-00 Rev. C Page 15
88PG82XX Datasheet
2.3
Electrical Characteristics
The following applies unless otherwise noted: SVIN = PVIN1= PVIN2, VVSET1 = VPSET = 0, VOUT1 = 1.8V, VVSET2 = SVIN, VPSET2 = 0, VOUT2 = 1.2V, VEN = SVIN, L (BUCK1) = 2.2 H, COUT (BUCK1) = 22F (Ceramic), L (BUCK2) = 2.2 H, COUT (BUCK2) = 22 F (Ceramic), TA = 25 C. Bold values indicate -40 C < TA < 85 C.
Table 6:
Electrical Characteristics Table
Parameter Signal Input Voltage Range Power Input Voltage Range Total Quiescent Current Shutdown Supply Current Undervoltage Lockout
S y m b ol SVIN PVIN
C o nd i ti on s SVIN = PVIN
Min 2.75 2.75
Ty p
Max 5.5 5.5
U n i ts V V mA
No load ISVIN VUVLO VEN = 0V High threshold, SVIN increasing Low threshold, SVIN decreasing 2.44
2.1 1 2.65 2.55 5.7 5.6 1.70 0.7 1 10 150 20 50 2.70
A
V V
Over-voltage Protection
VOVP
High threshold, SVIN increasing Low threshold, SVIN decreasing
V
EN Threshold Voltage
VEN
Enable regulators Disable regulators
V
EN Pin Input Current
IEN
VEN = 5.0V VEN = 0V
A
C
Over-temperature Thermal Shutdown
TOTS
TJ increasing (Disable regulators) TJ decreasing (Enable regulators)
105
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Electrical Specifications
Switching Step-down Regulator
2.4
Switching Step-down Regulator
The following applies unless otherwise noted: SVIN = PVIN1 = PVIN2, VVSET1 = VPSET = 0, VOUT1 = 1.8V, VVSET2 = SVIN, VPSET2 = 0, VOUT2 = 1.2V, VEN = SVIN, L (BUCK1) = 2.2 H, COUT (BUCK1) = 22 F (Ceramic), L (BUCK2) = 2.2 H, COUT (BUCK2) = 22 F (Ceramic), TA = 25 C. Bold values indicate -40 C < TA < 85 C.
Table 7:
Switching Step-down Regulator Table
Parameter Minimum Peak Switch Current Limit
S y m b ol ILIM
C o nd i ti on s 88PG8204 = VOUT1 88PG8204 = VOUT2 88PG8216 = VOUT1 88PG8216 = VOUT2 88PG8226 = VOUT1 88PG8226 = VOUT2 88PG8227 = VOUT1 88PG8227 = VOUT2 88PG8237 = VOUT1 88PG8237 = VOUT2 88PG8204 = VOUT1, L1 = 4.7 H 88PG8204 = VOUT2, L2 = 4.7 H 88PG8216 = VOUT1, L1 = 4.7 H 88PG8216 = VOUT2, L2 = 3.3 H 88PG8226 = VOUT1, L1 = 3.3 H 88PG8226 = VOUT2, L2 = 3.3 H 88PG8227 = VOUT1, L3 = 3.3 H 88PG8227 = VOUT2, L4 = 2.0 H 88PG8237 = VOUT1, L1 = 2.0 H 88PG8237 = VOUT2, L2 = 2.0 H
Min
Ty p 1.12 1.12 1.5 2.25 2.25 2.25 2.25 3.0 3.0 3.0 0.75 0.75 1.0 1.5 1.5 1.5 1.5 2.0 2.0 2.0 0.8 1.0 1.2 1.5 1.8 2.5 3.0 3.3 1.8 2.5 3.0 3.3
Max
U n i ts
A
Maximum Output Current
IOUT
A
Output Voltage
VOUT
RVSET = 11K RVSET = 18K RVSET = 30K RVSET = 51K RVSET = 100K RVSET = 160K RVSET = 270K RVSET = 470K
V
Output Voltage 1, Logic Programmability
VOUT1
VVSET1 = 0V, VPSET1 = 0V VVSET1 = 0V, VPSET1 = SVIN VVSET1 = SVIN, VPSET1 = 0V VVSET1 = SVIN, VPSET1 = SVIN
V
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88PG82XX Datasheet
Parameter Output Voltage 2, Logic Programmability
S y m b ol VOUT2
C o nd i ti on s VVSET2 = 0V, VPSET2 = 0V VVSET2 = 0V, VPSET2 = SVIN VVSET2 = SVIN, VPSET2 = 0V VVSET2 = SVIN, VPSET2 = SVIN
Min
Ty p 0.8 1.0 1.2 1.5 -10 -7.5 -5 -2.5 0 2.5 5 7.5 10 0.05
Max
U n i ts
V
Percentage Set
RVSET = 11K RVSET = 18K RVSET = 30K RVSET = 51K RVSET = 0K RVSET = 100K RVSET = 160K RVSET = 270K RVSET = 470K
%
Output Voltage Line Regulation Output Voltage Load Regulation Switching Frequency Switch Leakage Current
VLNREG
SVIN = PVIN = 3.0V to 5.0V VOUT = 1.5V ILOAD = IOUT(MAX)/4 SVIN = PVIN = 5.0V VOUT = 1.5V ILOAD = IOUT(MAX)/4 to IOUT(MAX) ILOAD = IOUT(MAX)/2 SVIN = PVIN = 5V, VEN = 0V VSW = PVIN SVIN = PVIN, VEN = 0V VSW = SGND = PGND
% 0.05 %
VLDREG
fSW ILSW
1 1 1 VOUT* 90% VOUT-13 0 mV VOUT* 90% VOUT-13 0 mV 0.4 1 40 50
MHz
A
50
Power-On Reset Threshold Voltage for Buck1
VPORTH
VOUT > 1.35V VOUT < 1.32V
V
Power-On Reset Threshold Voltage for Buck2
VPORTH
VOUT > 1.35V VOUT < 1.32V
V
Power-On Reset Output Low Voltage Power-On Reset Leakage Current Power-On Reset Delay
VPORL IPOR tRESET
ISINK = 2 mA, VEN = SVIN VEN = 5V
V
A
ms
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Functional Description
Regulation and Start-up
3
Functional Description
Figure 3: 88PG82XX Block Diagram
R1 C1 C5 C2
Vin 2.75V to 5.5V PVIN1
SVIN
PVIN2
+ OSCILLATOR
10
A
INTERNAL CIRCUITRY POWER SUPPLY DSP 1 EN 1
Current Sense
+ Current Sense SW2 L1
SW1
Vout 1
C3
DSP 2 PWM CONTROL SFB1
EN
ON OFF
A/D 1
DSP 1
PGND1
EN 2
A/D 2
DSP 2
PWM CONTROL
PVIN2
SFB1
L2
PGood 1
A/D 1 Serial Data Interface THERMAL SHUTDOWN 150C
A/D 2
SW2
Vout 2
C4
SDI
10
A
PGND2
SFB1 RESISTOR NETWORK PGood1 RESISTOR NETWORK
SFB2
PGood 2 40us /40ms
Vin
R3
BAND-GAP VOLTAGE REFERENCE
UNDERVOLTAGE LOCKOUT
FAULT RESISTOR SENSING CIRCUITRY
40us /40ms RESISTOR SENSING CIRCUITRY
POR1 POR2
VPOR
SGND
VSET1
R7
PSET1
R8
VSET2
R5
PSET2
R6
3.1
Regulation and Start-up
The step-down switching regulator uses Pulse Width Modulation (PWM) and Pulse Frequency Modulation (PFM) modes to regulate the output voltage using digital control. The mode of operation depends on the level of output current and the output voltage. In steady states, the step-down switching regulator monitors the current flowing through the inductor to determine if the regulator is handling heavy or light load applications. For heavy load applications, the step-down regulator operates in the PWM mode (B and C) to minimize the ripple current for optimum efficiency and to minimize the ripple output voltage. The step-down regulator operates in the PFM and Discontinuous Conduction Mode (DCM) (A and D) to limit the switching actions for optimum efficiency in light load applications. In this mode, the average output voltage is slightly higher than the average output voltage for heavy transient load applications.
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88PG82XX Datasheet
Figure 4: Output Voltage Window
Typical VOUT
A B C D
PFM Mode PWM Mode PFM Mode
3.1.1
Soft Start and Sequencing
The 88PG82XX device's outputs can either be sequenced to start up together or have VOUT1 start followed by VOUT2. When the SDI pin is low, the VOUT1 and VOUT2 will start up together with a start up time in the order of 100 s, as shown in Figure 5. If the SDI pin is high, then VOUT1 will start first and VOUT2 will start as soon as VOUT1 is within its specified tolerance (see Figure 6). Both outputs will have a soft start ramp. The POR2 output will go high 40 ms after VOUT2 is within its regulation limits. Soft start is a highly desirable property in "Hot-Plug" applications. The 88PG82XX starts up in less then 100 s when soft-start is disabled (Figure 7). However in soft-start mode, the 88PG82XX controls the rise time of the output voltage, thereby dramatically reducing the inrush current. The 88PG82XX rise time is roughly 0.25V/ms and it is independent of output capacitance and load current (see Figure 8). Figure 9 shows the output voltage rise time with a 100 F output capacitor. Although there is a difference in output capacitance between Figure 6 and Figure 9, the output voltage rise time difference is less than 0.1 ms.
Figure 5: Startup without Sequencing
Figure 6: Startup with Sequencing and Soft Start (COUT= 22 F)
2V/DIV VEN 1V/DIV VOUT1 1V/DIV VOUT2 VOUT2 VOUT1 VIN
5V/DIV
1.0V/DIV
1V/DIV
1.0 ms/DIV
2.0 ms/DIV
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Functional Description
Regulation and Start-up
Figure 7: Fast Startup (0.8V, 1.2V, 1.8V, 2.5V, 3.3V)
Figure 8: Soft Start up (0.8V, 1.2V, 1.8V, 2.5V, 3.3V)
VOUT
500mV/DIV
VOUT
500mV/DIV
20 s/DIV
2.0 ms/DIV
Figure 9: Inrush Current with COUT = 100 F
500 mV/DIV VOUT
IIN
100 mA/DIV
5.0 ms/DIV
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88PG82XX Datasheet
3.2
3.2.1
Output Voltage Settings
Logic Programmability
The output voltage of the step-down switching regulator can be programmed by connecting VSET and PSET pins to SGND and/or SVIN. This can be very useful for standard output voltages.
Table 8:
V V S E T1 SGND SGND SVIN SVIN SGND
Logic Programmability Table
V PS E T 1 SGND SVIN SGND SVIN 11KRPSET2475K V OUT 1 1.8V 2.5V 3.0V 3.3V Hi-Z V V S E T2 SGND SGND SVIN SVIN SGND V P SE T 2 SGND SVIN SGND SVIN 11KRPSET2475K V O U T2 0.8V 1.0V 1.2V 1.5V Hi-Z
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Functional Description
Output Voltage Settings
3.2.2
Serial Programmability
The output voltage of the step-down switching regulator can also program by using 18-bit serial data into the SDI pin.
Figure 10: Serial Programmability
WRITE MODE
Start Chip Select Registor Address DATA FIELD Stop
"1" Pulse
"1" "0" "0" pulse Pulse pulse
"1" Pulse
"0" "0" "1" "0" pulse pulse Pulse pulse
"1" Pulse
The period of a pulse is 1 s +/- 200 ns VHIGH > 1.4V VLow < 0.8V
D7 BIT 7
D6 BIT 6
D5 BIT 5
D4 BIT 4
D3 BIT 3
D2 BIT 2
D1 BIT 1
D0 BIT 0
"1" pulse The write operation : 1) 2) 3) be Each write sequence needs 18 pulses to complete. During a non -write operation , the input needs to be at V LOW (<0.8V). In between two successive write operations , the SDI input needs to at VLOW (<0.8V) for a minimum of 10 s
V HIGH
V LOW
For "1" pulse, the high is 0.75 s +/- 150 ns and the low period is 0.25 s+/-50 ns "0" pulse 1st Write sequence Low for at least 10 s 2 Write sequence
nd
VLOW
V HIGH
For "0" pulse, the high is 0.25 s +/- 50 ns and the low period is 0.75 s+/-150 ns
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88PG82XX Datasheet
The first 4 bits (MSB-bits) of the data field are used to select the output voltage where the second 4 bits (LSB-bits) of the data field are used to trim the output voltage (percent of output voltage). The default value for the data field is as follows.
Table 9:
Default Value of Data Field
D a ta F i e ld
D e s c r i p t io n B i ts D e f au l t Va l u e 7 0
Voltage Set 6 0 5 1 4 0 3 0
Percent Set 2 1 1 0 0 0
On power up, the output voltage is set according to RPSET and RVSET. The output voltage can then be field programmed by setting bit 3 and bit 7 to "1". The output voltage and percent set are selected according to Table 6.
Table 10: Voltage and Percentage Set
D a ta F i e l d B i ts Va lu e 7 1 1 1 1 1 1 1 1 6 0 0 0 0 1 1 1 1 5 0 0 1 1 0 0 1 1 4 0 1 0 1 0 1 0 1 0.8 1.0 1.2 1.5 1.8 2.5 3.0 3.3 V OUT (V ) 3 1 1 1 1 1 1 1 1 D a ta F i e l d 2 0 0 0 0 1 1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 1 -7.5% -10% -5.0% -2.5% +2.5% +5.0% +7.5% +10% Percent Set
All combinations of the VSET (Table 8) can be used with all combinations of the PSET (Table 8) to provide maximum flexibility in output voltage selection (Table 6). To select the output voltage, use the value from Table 7 to program the address bits.
Table 11: Output Voltage Selection
D e s c r i p t io n B i ts Va lu e R e g is t e r A d d r e s s 3 0 0 2 0 0 1 0 1 0 0 0 VOUT1 VOUT2 O u t p u t Vol ta g e S e le c t io n
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Functional Description
Output Voltage Settings
3.2.3
Output Voltage - AnyVoltageTM Technology
The output voltage of the step-down switching regulator is programmed by using Table 8 or Table 9 to select resistor values for VSET and PSET pin. The VSET pin sets the output voltage and the PSET pin trims the set voltage to a percentage value. For example, to program 2.25V output, a 165 k resistor is selected for the VSET pin, and an 11 k resistor is selected for the PSET pin. The 165 k resistor sets the output voltage to 2.5V and the 11 k resistor trims the set voltage by -10%. Using the VSET resistor's value greater than 619 k or less than 7.68 k disables the step-down switching regulator and sets the SW pin to high impedance. If the VSET resistor's value is outside the 5% tolerance, the output can be either higher or lower than the set voltage. Using resistor values greater than 619 k or less than 7.68 k for the PSET pin does not affect the set voltage. When the PSET pin is not used, it must be connected to ground. Like the VSET resistor, the percent value can be either higher or lower if the PSET resistor's value is outside the 5% tolerance.
Table 12: AnyVoltageTM Programming Table for 1% Resistors
P SE T -10.0% 11 k 11 k 1 8 .7 k 3 1 .6 k VSET 5 3 .6 k 9 7 .6 k 1 6 5k 2 8 0k 4 7 5k 0.720 0.900 1.080 1.350 1.620 2.250 2.700 2.970 -7.5% 1 8. 7 k 0.740 0.925 1.110 1.388 1.665 2.313 2.775 3.053 -5.0% 31.6k 0.760 0.950 1.140 1.425 1.710 2.375 2.850 3.135 -2.5% 5 3 .6 k 0.780 0.975 1.170 1.463 1.755 2.438 2.925 3.218 0% GND 0.800 1.000 1.200 1.500 1.800 2.500 3.000 3.300 2 . 5% 97.6k 0.820 1.025 1.230 1.538 1.845 2.563 3.075 3.383 5.0% 165k 0.840 1.050 1.260 1.575 1.890 2.625 3.150 3.465 7.5% 280k 0.860 1.075 1.290 1.613 1.935 2.688 3.225 3.548 1 0 .0 % 475k 0.880 1.100 1.320 1.650 1.980 2.750 3.300 3.630
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88PG82XX Datasheet
.
Table 13: AnyVoltageTM Programming Table for 5% Resistors
P SE T -10.0% 11 k 11 k 18k 30k VSET 51k 1 0 0k 1 6 0k 2 7 0k 4 7 0k 0.720 0.900 1.080 1.350 1.620 2.250 2.700 2.970 -7.5% 18k 0.740 0.925 1.110 1.388 1.665 2.313 2.775 3.053 -5.0% 3 0k 0.760 0.950 1.140 1.425 1.710 2.375 2.850 3.135 -2.5% 51k 0.780 0.975 1.170 1.463 1.755 2.438 2.925 3.218 0% GND 0.800 1.000 1.200 1.500 1.800 2.500 3.000 3.300 2 . 5% 100k 0.820 1.025 1.230 1.538 1.845 2.563 3.075 3.383 5.0% 160k 0.840 1.050 1.260 1.575 1.890 2.625 3.150 3.465 7.5% 270k 0.860 1.075 1.290 1.613 1.935 2.688 3.225 3.548 1 0 .0 % 470k 0.880 1.100 1.320 1.650 1.980 2.750 3.300 3.630
The VSET and PSET resistors are read once during start-up before the output voltage is turned on. After the output voltage is turned on, the output voltage can change to different values using serial programming interface. Otherwise to configure the output to a different voltage, power has to recycle or the 88PG82XX has to turn OFF and back ON using the shutdown pin. Figure 11 shows the startup waveforms of the 88PG82XX. Once the input voltage (VIN) is above the under voltage lockout (UVLO) upper threshold (UTH), the VSET and PSET pin become active. Current is first sourced out of PSET pin and then the VSET pin, in exponentially increasing steps. After each step there is a blanking time before the VSET voltage is compared to an internal 1.2V reference. If the VSET voltage is below internal reference voltage, the current source proceeds to the next step. Once the VSET voltage is above the internal reference voltage the sequence stops and the output voltage (VOUT) is allowed to turn on. The Figure 12 shows the VSET waveform for VSET = 2.5V and PSET = -5% output. The 88PG82XX keeps track of how many steps are required to determine the appropriate output voltage. Table 10 provides the number of steps necessary for each output voltage option. Using a VSET resistor of 165 k requires the current source to step 4 times, and a PSET resistor of 31.6 k requires 7 steps.
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Functional Description
Output Voltage Settings
Figure 11: Startup Sequence
Figure 12: VSET = 2.5V and PSET = -5%
2V/DIV
VIN VOUT VVSET VPSET
1V/DIV VVSET 1V/DIV 500mV/DIV
1V/DIV
VPSET
500mV/DIV
2.0 ms/DIV
200 s/DIV
Table 14: Output Voltage Option Steps
Ste p 1 2 3 4 5 6 7 8 9 V O U T (V ) 0 3.3 3.0 2.5 1.8 1.5 1.2 1.0 0.8 RV S ET (K ) 0 475 280 165 97.6 53.6 31.6 18.7 11 Step 1 2 3 4 5 6 7 8 9 P S ET (% ) 0 +10 +7.5 +5.0 +2.5 -2.5 -5.0 -7.5 -10 R S PS E T (k ) 0 475 280 165 97.6 53.6 31.6 18.7 11
The 88PG82XX provides an innovative technique to set the output voltage. During start-up it reads the value of external resistors, which are located outside the regulator's feedback loop to program the output voltage. By placing the output voltage programming resistor outside the regulator's feedback loop, its tolerance does not affect the accuracy of the output voltage. Normally, adjustable regulators use 1% resistors to set the output voltage. However, these resistors are located inside the feedback loop, introducing as much as 2% of initial accuracy error to the output voltage, resulting in an overall initial accuracy of 3%. Whereas, the 88PG82XX initial accuracy is 2% for any of the eight output voltages. The VSET and PSET pins are sensitive to excessive leakage currents and stray capacitance. The output voltage can potentially be programmed to the lower output voltage if there is contamination, which introduces excessive leakage current on the VSET and PSET pin, especially for a RVSET and RPSET of 470k. The parasitic resistance on these nodes must be greater than 3 M and the stray capacitance must be less than 25 pF; otherwise, a 3.3V output can potentially end up at 3V.
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88PG82XX Datasheet
3.3
Undervoltage Lockout (UVLO)
This feature ensures that the internal MOSFETs have adequate voltage levels to operate properly. When the input voltage drops below 2.55V (typical), both MOSFETs are off until the input rises above the upper threshold of 2.65V (typical).
3.4
Over Voltage Protection (OVP)
An over voltage comparator guards against transient overshoots, as well as other serious conditions, that may damage the IC. When the input voltage is rises above 5.7V (typical), both internal MOSFETs are turned off until the input voltage drops below the lower threshold of 5.6V (typical)
Figure 13: UVLO and OVP Waveforms
VOVP_HTH VOVP-LTH
VUVLO-HTH VUVLO-LTH
VIN BUCK 1 Output Enable BUCK 1 Output Disable Buck 2 Output Enable Buck 2 Output Disable Undefined Undefined
3.5
Power-On Reset (POR)
The Power-On Reset (POR) pin is an active-high, open-drain output pin. This output is held low when the output voltage of the step-down regulator is below the threshold. When the output voltage is above the threshold, the Power-On Reset pin goes high 40 ms later. Setting the output voltage greater than 1.35V, the threshold voltage is 0.9% * VOUT (typical). Setting the output voltage less than 1.32V, the threshold voltage is VOUT - 130 mV (typical). A built-in 25 s (tDELAY) delay is incorporated to prevent nuisance tripping.
Figure 14: Power-On Reset Waveforms
V POOD_TH
VOUT t V POR VPORH VPORL DELAY DELAY
40 ms
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Functional Description
Thermal Shutdown
3.6
Thermal Shutdown
When the junction temperature of the 88PG82XX exceeds 150 C (typical), the thermal shutdown circuitry disables the step-down regulator. The step-down switching regulator is enabled when the junction temperature is decreased to 105 C (typical).
3.7
Adaptive Transient Response
The 88PG82XX device's Smart Technology allows the step-down switching regulator to quickly respond to the multiple step loads and maintain stability over a wide range of applications. Figure 15 shows an example of a second step-load applied while the output voltage of the step-down switching regulator increased due to the inductive kick from the first step-load. Condition: VIN = 5.0V, RSVIN = 10, CSVIN = 0.1 F, CPVIN = 22 F, L = 3.3 H, COUT = 22 F, VOUT = 1.2V, ILOAD = 500 mA to 1.5A.
Figure 15: Adaptive Transient Response
VOUT
100mV/DIV
ILOAD
1A/DIV
20 s/DIV
The worst case overshoot (VSOAR) during a full-load to light-load transient due to stored inductor energy (Figure 15) can be calculated as: I LOAD ( MAX ) * L V SOAR = -------------------------------------------2 * C OUT * V OUT Although the VSOAR cannot be eliminated, its amplitude can be controlled based on the COUT capacitor value. The appropriate COUT value can easily be calculated for the acceptable VSOAR level for each specific application. I LOAD ( MAX ) * L C OUT = -------------------------------------------2 * V SOAR * V OUT
2 2
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88PG82XX Datasheet
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Functional Characteristics
Start-Up Waveforms
4
4.1
Functional Characteristics
The following applies unless otherwise noted: TA = 25C, RSVIN = 10, CSVIN = 0.1 F, CPVIN = 2 x 22 F, L1 = L2 = 3.3 H, COUT (BUCK1) = 22 F (ceramic), COUT (BUCK2) = 22 F (ceramic).
Start-Up Waveforms
NOTE: When the input voltage rises above the UVLO's upper threshold, there is a delay (4 ms typ) before the
step-down regulator's output voltage turns on.
Figure 16: Startup Using the Enable Pin
Figure 17: Turn Off Using the Enable Pin
2V/DIV VEN
VEN 2V/DIV VBUCK1
1V/DIV VBUCK1 1V/DIV VBUCK2 VBUCK2 1V/DIV 1V/DIV
1 ms/DIV
VIN = 5.0V VBUCK1= 1.2V VBUCK2= 1.2V ILOAD = No Load tDLY= 4.0 ms SDI = 0V VIN = 5.0V VBUCK1= 1.2V VBUCK2= 1.2V
1 ms/DIV
ILOAD = 50 mA
Figure 18: Startup Sequence
Figure 19: Hot Plug
5V/DIV VIN 2V/DIV VBUCK1 2V/DIV VBUCK2 5V/DIV VPOR1 VPOR2 5V/DIV VPOR1 VBUCK2 VBUCK1 VIN
5V/DIV 2V/DIV 2V/DIV 5V/DIV 5V/DIV VPOR2
10 ms/DIV
VIN = 5.0V VBUCK1= 1.2V VBUCK2= 1.2V ILOAD = No Load SDI = 0V VIN = 5.0V VBUCK1= 1.2V
10 ms/DIV
VBUCK2= 1.2V ILOAD = No Load SDI = 0V
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88PG82XX Datasheet
Figure 20: UVLO and OVP Thresholds
Figure 21: Input Soft Start and Start up Sequence
5V/DIV VIN VIN VBUCK1 1V/DIV 1V/DIV VBUCK2 1V/DIV VBUCK2 2V/DIV VBUCK1 1V/DIV
100 ms/DIV
VIN = 0 to 6.0V VBUCK1= 1.0V VBUCK2= 1.0V ILOAD1 = 10 mA ILOAD2 = 10 mA VUVLO(HTH) = 2.608V VUVLO(LTH)= 2.531V VOVP(HTH) = 5.64V VOVP(LTH) = 5.32V VIN = 5V VBUCK1= 1.2V VBUCK2= 1.2V ILOAD = No Load SDI = SVIN
2.0 ms/DIV
4.2
Short-Circuit Waveforms
Figure 22: Step-Down Short-Circuit Response
VSW 5V/DIV VBUCK
Short Circuit
500 mV/DIV
2nd Peak Current Limit
2A/DIV IIND
1st Peak Current Limit
200 s/DIV
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Functional Characteristics
Switching Waveforms
4.3
Switching Waveforms
NOTE: For repeatability of measuring output ripple (VBUCK (P-P)) for the BUCK regulator, the standard test procedure limits the scope bandwidth to 20 MHz and uses a coax cable with very short leads terminated into 50. The coax leads must be routed away from the switching node as much as possible.
Figure 23: Switching Waveforms PWM mode
VSW VSW 5V/DIV IIND VBUCK VIN 1A/DIV IIND VBUCK VIN
Figure 24: Switching Waveforms PWM mode
5V/DIV 1A/DIV
10 mV/DIV
10 mV/DIV
100 mV/DIV
50 mV/DIV
500 ns/DIV
CIN = 22 F VIN = 5.0V VBUCK= 1.2V IOUT = 1.5A VOUT(P-P) = 5.4 mV (Note) VIN(P-P) = 77.3 mV IIND(P-P) = 412.3 mA IIND(PK) = 1.73A Freq = 940 kHz CIN = 2 x 22 F VIN = 5.0V VBUCK= 1.2V IOUT = 1.5A
500 ns/DIV
VIN(P-P) = 58.9 mV IIND(P-P) = 446.8 mA IIND(PK) = 1.76A Freq = 940 kHz
VOUT(P-P) = 5 mV (Note)
Figure 25: Switching Waveforms DCM Mode
Figure 26: Switching Waveforms - DCM
Mode-Zoom
VSW VBUCK
5V/DIV
VSW VBUCK
5V/DIV
20 mV/DIV
20 mV/DIV
IIND 200 mA/DIV
IIND 200 mA/DIV
5 s/DIV
VIN = 5.0V VBUCK= 1.2V IOUT = 29 mA VOUT(P-P) =22 mV (Note) IIND(PK) = 440 mA Freq = 187 kHz VIN = 5.0V VBUCK= 1.2V IOUT = 29 mA
500 ns/DIV
Ringing Freq = 6.5 MHz
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88PG82XX Datasheet
Figure 27: PWM Output Ripple Voltage
VBUCK1
10 mV/DIV
VBUCK2
10 mV/DIV
100 ms/DIV
VIN = 5.0V VBUCK1= 1.2V VBUCK2= 1.2V IOUT1 = 1.5A IOUT2 = 1.5A VBUCK1(P-P) = 7.3 mV (Note) VBUCK2(P-P) = 8.2 mV (Note)
4.4
Load Transient Waveforms
4.4.1 Step-Down Regulator
Figure 28: Fast Load Rise Time
Figure 29: Slow Load Rise Time
VSW VBUCK
5V/DIV
VSW VBUCK
5V/DIV
100 mV/DIV
100 mV/DIV
ILOAD IIND
1A/DIV 1A/DIV
ILOAD IIND
1A/DIV 1A/DIV
2 s/DIV
VIN = 5.0V VBUCK= 1.2V IOUT = 500 mA to 1.5A COUT = 22 F tRISE = 13.1 A/s VIN = 5.0V VBUCK= 1.2V IOUT = 500 mA to 1.5A
2 s/DIV
COUT = 2 F tRISE = 1.2 A/s
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Functional Characteristics
Load Transient Waveforms
Figure 30: Fast Load Fall Time
Figure 31: Slow Load Fall Time
VSW VBUCK
5V/DIV
VSW 5V/DIV VBUCK
100 mV/DIV
100 mV/DIV
ILOAD IIND
1A/DIV 1A/DIV
ILOAD IIND
1A/DIV 1A/DIV
2 s/DIV
VIN = 5.0V VBUCK= 1.2V IOUT = 500 mA to 1.5A COUT = 22 F tFALL = 88 A/s VIN = 5.0V VBUCK= 1.2V IOUT = 500 mA to 1.5A
2 s/DIV
COUT = 22 F tFALL = 1.2 A/s
Figure 32: Load Transient Response
Figure 33: Double-Pulsed Load Response
VBUCK
100 mV/DIV VBUCK 100 mV/DIV
ILOAD 1A/DIV ILOAD 1A/DIV
20 s/DIV
VIN = 5.0V VBUCK= 1.2V COUT = 22 F ILOAD = 500 mA to 1.5A tRISE = 13.8 A/s tFALL = 121 A/s VIN = 5.0V VBUCK= 1.2V COUT = 22 F
20 s/DIV
ILOAD = 500 mA to 1.5A tRISE = 11.2 A/s tFALL = 95.3 A/s
Copyright (c) 2008 Marvell April 23, 2008, 2.00 Document Classification: Proprietary Information
Doc. No. MV-S103563-00 Rev. C Page 35
88PG82XX Datasheet
Figure 34: Load Transient Response
Figure 35: Double-Pulsed Load Response
VBUCK
100 mV/DIV VBUCK 100 mV/DIV
ILOAD ILOAD 1A/DIV 1A/DIV
20 s/DIV
VIN = 5.0V VBUCK= 1.2V COUT = 2 x 22 F ILOAD = 500 mA to 1.5A tRISE = 15 A/s tFALL = 95.2 A/s VIN = 5.0V VBUCK= 1.2V COUT = 2 x 22 F
20 s/DIV
ILOAD = 500 mA to 1.5A tRISE = 13.2 A/s tFALL = 91 A/s
4.4.2
Cross-Talk Waveforms
Figure 37: Cross-talk Discontinuous Mode
Figure 36: Cross-talk Continuous Mode
VOUT1 VOUT2
20 mV/DIV
VOUT1 VOUT2
20 mV/DIV
200 mV/DIV
200 mV/DIV
IOUT_2
2A/DIV
IOUT_2
2A/DIV
20 s/DIV
IOUT1 = 30 mA IOUT2 = 0.5A to 2.0A VOUT1 = 1.5V VOUT2 = 1.5V IOUT1 = 500 mA IOUT2 = 0.5A to 2.0A
20 s/DIV
VOUT1 = 1.5V VOUT2 = 1.5V
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Copyright (c) 2008 Marvell April 23, 2008, 2.00
Functional Characteristics
Output Voltage Transient Waveforms
4.5
Output Voltage Transient Waveforms
The following graphs show the effect of changing the step-down regulator's output voltage using the serial interface. Depending on the change in the step-size of the output voltage, the output load, and the output capacitance, the power-on reset pin de-asserts when the changes of the output voltage occur beyond the 25 s (typical) delay.
4.5.1
Step-Down Regulator
Figure 39: VOUT = 1.0V to 1.5V with No Load
Figure 38: VOUT = 1.0V to 1.2V with No Load
VBUCK
500 mV/DIV VBUCK
500 mV/DIV
VPOR SDI
5V/DIV
VPOR 5V/DIV SDI 5V/DIV
5V/DIV
100 s/DIV
VIN = 5.0V COUT= (2 x 22) + 1000 F VIN = 5.0V
100 s/DIV
COUT= (2 x 22) +1000 F
Figure 40: VOUT = 1.0V to 1.2V with ILOAD = 1.5A
Figure 41: VOUT = 1.0V to 1.5V with ILOAD = 1.5A
500 mV/DIV VBUCK 500 mV/DIV VBUCK
VPOR SDI
5V/DIV
VPOR 5V/DIV SDI 5V/DIV
5V/DIV
100 s/DIV
VIN = 5.0V COUT= (2 x 22) + 1000 F VIN = 5.0V
100 s/DIV
COUT= (2 x 22) +1000 F
Copyright (c) 2008 Marvell April 23, 2008, 2.00 Document Classification: Proprietary Information
Doc. No. MV-S103563-00 Rev. C Page 37
88PG82XX Datasheet
Figure 42: VOUT = 1.2V to 1.0V with ILOAD = 1.5A
Figure 43: VOUT = 1.5V to 1.0V with ILOAD = 1.5A
VBUCK VBUCK 500 mV/DIV 500 mV/DIV
VPOR SDI
5V/DIV
VPOR SDI
5V/DIV
5V/DIV
5V/DIV
100 s/DIV
100 s/DIV
VIN = 5.0V COUT= (2 x 22)+1000 F
VIN = 5.0V COUT= (2 x 22)+1000 F
4.6
Line Transient Waveforms
Figure 45: Line Transient @ VIN = 4.5V
Figure 44: Line Transient @ VIN = 3.6V
VIN
3.2V 3.6V
1V/DIV VIN 1V/DIV
4.1V 4.5V
VBUCK
20 mV/DIV VBUCK 20 mV/DIV
2 ms/DIV
VIN = 3.6V CIN= 22 F VBUCK = 1.2V ILOAD = 1.5A VIN = 4.5V CIN= 22 F
2 ms/DIV
VBUCK = 1.2V ILOAD = 1.5A
Doc. No. MV-S103563-00 Rev. C Page 38 Document Classification: Proprietary Information
Copyright (c) 2008 Marvell April 23, 2008, 2.00
Typical Characteristics
Efficiency Graphs
5
5.1
100 90 Efficiency (%)
Typical Characteristics
Efficiency Graphs
Efficiency vs. Output Current Vin = 5.0V
Efficiency vs. Output Current Vin = 3.3V 100 90 Efficiency (%)
80 3.3V 2.5V 1.8V 1.5V 1.2V 1.0V 0.8V 0 0.5 Output Current (A) 1 1.5
26 G1
80 70 2.5V 1.8V 1.5V 1.2V 1.0V 0.8V 0 0.5 Output Current (A) 1 1.5
26 G2
70
60
60 50
50
5.1.1
Efficiency Graphs in Log Scale
Efficiency vs. Output Current Vin = 5.0V 100
100
Efficiency vs. Output Current Vin = 3.3V
90 Efficiency (%) 80 3.3V 2.5V 1.8V 1.5V 1.2V 1.0V 0.8V 0.1 Output Current (A) 1 10
26 G3
90 Efficiency (%)
80 70 2.5V 1.8V 1.5V 1.2V 1.0V 0.8V 0.1 Output Current (A) 1 10
26 G4
70 60
60
50 0.01
50 0.01
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Doc. No. MV-S103563-00 Rev. C Page 39
88PG82XX Datasheet
5.2
Load Regulation
Output Voltage vs. Output Current Vout = 1.5V 1.60
Output Voltage (V)
1.55
1.50
1.45
3.3V 5.0V
1.40 0 0.2 0.4 0.6 0.8 1 Output Current (A) 1.2 1.4 1.6
26 G5
5.3
Dropout Voltage
88PG8226 Buck Dropout vs. Load Current Vin = 3.2, Vout = 3.3V 0.4 0.35
Buck Dropout (V)
85C 25C -40C
0.3 0.25 0.2 0.15 0.1 0.05 0 0
0.5
1
Load Current(A)
1.5
2
26 G6
5.4
RDS (ON) Resistance
TOP Switch Resistance vs. Temperature
BOT Switch Resistance vs. Temperature 0.070 Resistance (ohm)
Vin = 3.0V Vin = 4.0V
0.130
Resistance (ohm)
0.120 0.110 0.100 0.090 0.080 0.070 -40 -20
0.060 0.050 0.040 0.030 0.020
Vin = 3.0V Vin = 4.0V Vin = 5.0V
Vin = 5.0V
0
20
40
60
80
26 G7
-40
-20
0
20
40
60
80
26 G8
Temperature (C)
Temperature (C)
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Copyright (c) 2008 Marvell April 23, 2008, 2.00
Typical Characteristics
IC Case and Inductor Temperature
TOP Switch Resistance vs. Input Voltage 0.130 Resistance (ohm) 0.120 0.110 0.100 0.090 0.080 0.070 3 3.5 4 4.5 Input Voltage(V) 5
26 G9 85C 25C - 40C
BOT Switch Resistance vs. Input Voltage 0.070
Resistance (ohm)
85C
0.060 0.050 0.040 0.030 0.020 3 3.5 4 4.5
25C - 40C
5
26 G10
Input Voltage (V)
5.5
IC Case and Inductor Temperature
The following data was taken using a 1.4 square inch PCB 1 oz. copper and L = 1.2 H. Actual results depend upon the size of the PCB proximity to other heat emitting components.
Input Current vs. Output Current Vin = 5V, Ta = 25C 2.0
3.3V 3.0V 2.5V 1.8V 1.5V 1.2V 1.0V 0.8V
Input Current vs. Output Current Vin = 3.3V, Ta = 25C 2.0
Input Current (A)
Input Current (A)
1.5
1.5
2.5V 1.8V 1.5V 1.2V 1.0V 0.8V
1.0
1.0
0.5
0.5
0.0 0 0.5 1 Output Current (A) 1.5 2
26 G11
0.0 0 0.5 1 Output Current (A) 1.5 2
26 G12
IC Case Temperature vs. Output Current Vin = 5V, Ta = 25C 60 55 Temperature (C) 50 45 40 35 30 25 0 0.5 1 Output Current (A)
26 G13
IC Case Temperature vs. Output Current Vin = 3.3V, Ta = 25C 60 55 Temperature (C) 50 45 40 35 30 25
2.5V 1.8V 1.5V 1.2V 1.0V 0.8V
3.3V 3.0V 2.5V 1.8V 1.5V 1.2V 1.0V 0.8V
1.5
2
0
0.5
1 Output Current (A)
1.5
2
26 G14
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Doc. No. MV-S103563-00 Rev. C Page 41
88PG82XX Datasheet
Inductor Temperature vs. Output Current Vin = 5V, Ta = 25C
50 45 Temperature(C) 40 35 30 25 0 0.5 1 Output Current (A)
26 G15
Inductor Temperature vs. Output Current Vin = 3.3V, Ta = 25C
50
Temperature (C)
3.3V 3.0V 2.5V 1.8V 1.5V 1.2V 1.0V 0.8V
45 40 35 30 25
2.5V 1.8V 1.5V 1.2V 1.0V 0.8V
1.5
2
0
0.5
1 Output Current (A)
1.5
2
26 G16
Inductor Temperature vs. Output Current 2 Output Current 1 = 2A Vin = 3.3V, Ta = 25C
IC Case Temperature vs. Output Current 2 Output Current 1 = 2A Vin = 3.3V, T = 25C
65 60 Temperature (C) 55 50 45 40 35 30 25 0 0.5 1 1.5 Output Current 2 (A) 2
26 G17
Temperature (C)
2.5V 1.8V 1.5V 1.2V 1.0V 0.8V
80 75 70 65 60 55 50 45 40 0
2.5V 1.8V 1.5V 1.2V 1.0V 0.8V
0.5 1 1.5 Output Current 2 (A)
2
26 G18
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Typical Characteristics
Input Voltage Graphs
5.6
Input Voltage Graphs
The 88PG8237 part was used to determine the following graph data.
Supply Current vs. Input Voltage 4.0
8
Shutdow n Supply Current vs. Input Voltage See Test Conditions
Supply Current (mA)
3.0
Shutdown Current (uA) 6
2.0
4
1.0
2
0.0 2.5 3 3.5 4 4.5 5
26 G19
0 2.5 3 3.5 4 4.5 5 5.5 6
Input Voltage (V)
Input Voltage (V)
Load = No Load
VEN = GND
Enable Threshold Vout 1 vs. Input Voltage 3.0 2.5 Enable Threshold (V) 2.0 1.5 1.0 0.5 0.0 2.5 3 3.5 4 4.5 5
26 G21
UTH-Enable LTH-Disable
Input Voltage (V)
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Doc. No. MV-S103563-00 Rev. C Page 43
88PG82XX Datasheet
5.6.1
Step-Down Regulator
Output Voltage vs. Input Voltage 1.53
Efficiency vs. Input Voltage 100%
1.515 Output Voltage (V)
95% Efficiency
1.5
90% Vout1 Vout2 80%
1.485
Vout1 Vout2
85%
1.47 3 3.5 4 Input Voltage (V)
26 G22
4.5
5
3
3.5
4 Input Voltage (V)
4.5
5
26 G23
IOUT(BUCK) = 375 mA
VOUT(BUCK) = 1.5V IOUT(BUCK) = 0.75A
Load Regulation vs. Input Voltage
Frequency vs. Input Voltage 1000
0.20%
0.10% Load Regulation
Frequency (kHz)
950
Vout1 Vout2
0.00%
Vout1
900
-0.10%
850
Vout2
-0.20% 3 3.5 4 Input Voltage (V) 4.5 5
26 G24
800 3 3.5 4 Input Voltage (V)
26 G25
4.5
5
VOUT(BUCK) = 1.5V IOUT(BUCK) = 0.375A - 1.5A
VOUT(BUCK) = 1.5V IOUT(BUCK) = 0.75A
Average Output Current Limit vs. Input Voltage
5.0 4.0 Current Limit (A) 3.0 2.0
Vout1
1.0 0.0 3 3.5
Vout2
4 Input Voltage (V)
4.5
5
26 G26
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Copyright (c) 2008 Marvell April 23, 2008, 2.00
Typical Characteristics
Temperature Graphs
5.7
Temperature Graphs
The 88PG8237 part was used to determine the following graph data.
Supply Current vs. Temperature 5
Shutdown Supply Current vs.Temperature
120.0
4 Supply Current (mA)
100.0 Shutdown Current(uA)
-40 -20 0 20 40 60 80
26 G27
3
80.0 60.0 40.0 20.0 0.0 -40 -20 0 20 40 60 80
26 G28
2
1
0 Temperature (C)
Temperature (C)
IOUT(BUCK1) = No Load IOUT(BUCK2) = No Load
VIN = 5V VEN = GND
UVLO vs. Temperature 2.7
3.0
Enable Threshold Vout 1 vs. Temperature
UTH - Enable 2.5 LTH - Disable Enable Treshold (V)
2.6 UVLO (V)
2.0 1.5 1.0 0.5 0.0
2.5 UTH LTH 2.4 -40 -20 0 20 40 60 80
26 G29
-40
-20
0
20
40
60
80
Temperature (C)
Temperature (C)
26 G30
VIN= 5V IOUT(BUCK) = 10mA
VIN = 5V IOUT(BUCK) = 10mA
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Doc. No. MV-S103563-00 Rev. C Page 45
88PG82XX Datasheet
5.7.1
Step-Down regulator
Output Voltage vs. Temperature 1.53
100%
Buck Efficiency vs. Temperature
1.515 Output Voltage (V)
Efficiency
95%
1.5
90%
1.485
Vout1 Vout2
85%
Vout1 Vout2
1.47 -40 -20 0 20 40 60 80
26 G31
80% -40 -20 0 20 40 60 80
26 G32
Temperature (C)
Temperature (C)
VIN = 5.0V IOUT(BUCK) = 750 mA
VIN = 5.0V VOUT(BUCK) = 1.5V IOUT(BUCK) = 1.5A
Buck Load Regulation vs. Temperature 0.20%
0.20%
Buck Line Regulation vs. Temperature
Vout1
0.10% Load Regulation
Line Regulation
0.10%
Vout2
0.00%
0.00%
-0.10%
Vout1 Vout2
-0.10%
-0.20% -40 -20 0 20 40 60 80 Temperature (C)
26 G33
-0.20% -40 -20 0 20 40 60 80 Temperature (C)
26 G34
VIN = 5.0V VOUT(BUCK) = 1.5V IOUT(BUCK) = 750 mA - 3A
VIN = 3.0V - 5.0V VOUT(BUCK) = 1.5V IOUT(BUCK) = 1.5A
Buck Current Limit vs. Temperature
5
Frequency vs. Temperature
1000
4
950 Frequency (kHz)
Vout1 Vout2
Current Limit (A)
3
900
2
Vout1
1
Vout2
850
0 -40 -20 0 20 40 60 80 Temperature (C)
26 G35
800 -40 -20 0 20 40 60 80
26 G36
Temperature (C)
VIN = 5.0V IOUT(BUCK) = 1.5A
Doc. No. MV-S103563-00 Rev. C Page 46 Document Classification: Proprietary Information
Copyright (c) 2008 Marvell April 23, 2008, 2.00
Applications Information
PC Board Layout Considerations and Guidelines
6
6.1
Applications Information
PC Board Layout Considerations and Guidelines
The PC board layout is very critical in any switching converter. An improper layout can contribute to system instability, excessive EMI (Electro-magnetic interference), and high switching loss. Follow these basic guidelines for good PC layout: 1. 2. 3. 4. This is a 2-layer board with 1 ground plane and 1 routing layer. Copy the layout input Figure 48 and Figure 49 as much as possible and use the recommended BOM in Table 15. Contact the factory where substitutions are made. Review the recommended solder pad layout and notes on page 50. Do not replace the Ceramic input capacitor with any other type of capacitor. Any type of capacitor can be placed in parallel with the input capacitor as long as the Ceramic input capacitor is placed next to the IC. If Tantalum input capacitor is used, it must be rated for switching regulator applications and the operating voltage must be derated by 50%. Any type of capacitor can be placed in parallel with the output capacitor. Low-ESR capacitors like the POSCAP from Sanyo can replace the Ceramic output capacitors as long as the capacitor value is the same or greater. Note that the Ceramic capacitors provide the lowest noise and smallest foot print solution. Use planes for the ground, input and output power to maintain good voltage filtering, and to keep power losses low. If there is not enough space for a power plane for the input supply, then the input supply trace must be at least 3/8 inch wide. If there is not enough space for a power plane for the output supplies, then place the output as close to the load as possible with a trace at least 3/8 inch wide. Do not lay out the inductor first. The input capacitor placement is the most critical for proper operation. The AC current circulating through the input capacitor and loop 1 (LP1) are square wave with rise and fall times of 8 ns and slew rates as high as 300 A/s (see Figure 46). At these fast slew rates, stray PCB inductance can generate a voltage spike as high as 3V per inch of PCB trace, VIND = L * di/dt. Therefore, the ceramic input capacitor (C2 and C5) must be placed as close as possible to the PVIN and PGND pins with a short and wide trace as possible. Also, the PVIN and PGND traces must be placed on the top layer. This will isolate the fast AC currents from interfering with the analog ground plane. The 88PG82XX has two internal grounds, analog (SGND) and power (PGND). The analog ground ties to all the noise sensitive signals (PSET, VSET, and SVIN) while the power ground ties to the higher current power paths. Noise on an analog ground can cause problems with the IC's internal control and bias signals. For this reason, separate analog and power ground traces are recommended. The signal ground is connected to the power ground at one point, which is the (-) terminal of the output capacitor. Keep loop 2 (LP2) as small as possible and connect the (-) terminal of the output capacitor as close to the (-) terminal of the input capacitor. A back-to-back placing of bypass capacitors, as shown in Figure 48, is recommended for best results. Keep the switching node (SW) away from the SFB pin and all sensitive signal nodes, minimizing capacitive coupling effects. If the SFB trace must cross the SW node, cross it at a right angle. Try not to route analog or digital lines in close proximity to the power supply especially the VSW node. If this can't be avoided, shield these lines with a power plane placed between the VSW node and the signal lines.
5. 6.
7. 8. 9. 10.
11.
12.
13. 14.
Copyright (c) 2008 Marvell April 23, 2008, 2.00 Document Classification: Proprietary Information
Doc. No. MV-S103563-00 Rev. C Page 47
88PG82XX Datasheet
15. PVIN1 and PVIN2 must be connected together and should not be separated. 16. The type of solder paste recommended for QFN packages is "No clean", due to the difficulty of cleaning flux residues from beneath the QFN package.
Figure 46: Simpified Schematic
I Cout
I Cin
LP2
C4
LP1
Vout 2 1.5V/2.0A
C5
LP2
L2
Vin 2.75V - 5.5V
LP1
20 19 18 17 R2 100 k R3 100 k
SW2
SW2
PG ND2
PVIN2
PO R 1 16 15 14 13 12 11 R8 0 R7 16 0k R5 51k R6 0 PO R 2
EN R4 100 k R1
1 2 3 10 ohm C1 0.1 uF 4 5 SD I 6
EN SFB 2 SVI N
PO R2 PSE T2 VSE T2
Vin
88PG82XX
SG ND SFB 1 PG ND1 SD I SW1 VSE T1 PSE T1 PO R1 PVIN1 10 SW1
7
8
L1
LP1 LP2
Vin
C2
Vout1 2.5V/1.5A
C3
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9
Copyright (c) 2008 Marvell April 23, 2008, 2.00
Applications Information
PC Board Layout Considerations and Guidelines
Figure 47: PC Board Schematic
C4 22uF/6.3V
Vout 2 1.5V/1.5A
L2 3.3uH
C5 22uF/6.3V
Vin 2.75V - 5.5V
R3 100k
R2 100k
20
18 SW2
SW2
19
PGND2
PVIN2
17
POR 1 16 15 14 13 12 11 R8 0 R7 160k R5 51k R6 0 POR 2
EN R4 100k R1
1 2 3 10 ohm C1 0.1uF 4 5 SDI 6
EN SFB2 SVIN
POR2 PSET2 VSET2
Vin
88PG8226
SGND SFB1 PGND1 SDI SW1 VSET1 PSET1 POR1 PVIN1 10 SW1 9
7 L1 3.3uH
8
Vin
22uF/6.3V C2
Vout 1 2.5V/1.5A
22uF/6.3V C3
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Doc. No. MV-S103563-00 Rev. C Page 49
88PG82XX Datasheet
6.1.1
PC Board Layout Examples for 88PG82XX
Actual board size = 570 mil x 630 mil; Area = 0.359 Sq. Inches. Total copper layers = 2 (Top and Bottom) All the components are on the top layer
Figure 48: Top Silk-Screen, Top Traces, Vias, and Top Copper (Not to Scales)
Actual board size = 711 mil x 1060 mil Total copper layer = 2
Connect the BUCK2 output voltage at this point
Connect to the ground plane of the board
Connect to the ground plane of the board
Connect the BUCK1 output voltage at this point
Connect to the ground plane of the board
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Applications Information
PC Board Layout Considerations and Guidelines
Figure 49: Bottom Silk Screen, Bottom Trace, Vias, and Bottom Copper (Not to Scale)
Connect the POR 2 signal at this trace.
Connect to the input voltage plane of the board .
Connect to the input voltage plane of the board .
Connect to the ground plane of the board.
Connect the POR 2 signal at this trace.
Connect to the input voltage plane of the board .
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Doc. No. MV-S103563-00 Rev. C Page 51
88PG82XX Datasheet
6.1.2
Bill of Materials (BOM)
The following tables list the components used with the 88PG82XX.
Table 15: BOM for 88PG82XX
Ite m 1 2 3 4 5 6 7 Ite m 1 2 3 4 5 6 7 8 9 Ite m 1 2 3 4 5 6 7 8 Q t y. 1 1 4 2 1 1 4 Q t y. 1 1 1 3 1 1 1 3 4 Q t y. 1 1 2 2 1 1 1 3 R ef . U1 C1 C2,C3, C4,C5 L1,L2 R1 R2,R3, R4 R5,R6, R7,R8 R ef . U1 C1 C3 C2,C4, C5 L1 L2 R1 R2,R3, R4 R5,R6, R7,R8 R ef . U1 C1 C2,C5 C3,C4 L1 L2 R1 R2,R3, R4 M a n u f a ct ur e r P a r t # 88PG8227 ECJ-1VB1C104K C2012X5R0J226MT C2012X5R0J226MT A918CY-3R3M=P3 A918CY-2R0M=P3 ERJ-2RKF10R0X ERJ-3GEYJ104V M a n u f a ct ur e r P a r t # 88PG8216 ECJ-1VB1C104K C2012X5R0J106MT C2012X5R0J226MT A918CY-4R7M=P3 A918CY-2R0M=P3 ERJ-2RKF10R0X ERJ-3GEYJ104V M a n u f a ct ur e r P a r t # 88PG8204 ECJ-1VB1C104K C2012X5R0J106MT 1117AS-4R7M ERJ-2RKF10R0X ERJ-3GEYJ104V M an u fa ctu r e r Marvell Semiconductor Pansonic - ECG TDK Toko Pansonic - ECG Pansonic - ECG Pansonic - ECG M an u fa ctu r e r Marvell Semiconductor Pansonic - ECG TDK TDK Toko Toko Pansonic - ECG Pansonic - ECG Pansonic - ECG M an u fa ctu r e r Marvell Semiconductor Pansonic - ECG TDK TDK Toko Toko Pansonic - ECG Pansonic - ECG De sc r i pt io n 1MHz, Dual (0.75A/0.75A) Step-Down Regulator 0.1F,10%,X7R,16V,0603 Case Size, Ceramic 10F,20%,X5R,6.3V,0805 Case Size, Ceramic 4.7H, 0.91A, 170m, H=1mm, L=2.8mm, W=3.0mm 10.0, 1/16W, 1%, 0402 Case Size 100, 1/10W, 5%, 0603 Case Size See AnyVoltage Programming Table 1/16W, 1%, 0402 Case Size De sc r i pt io n 1MHz, Dual (1.0A/1.5A) Step-Down Regulator 0.1F,10%,X7R,16V,0603 Case Size, Ceramic 10F,20%,X5R,6.3V,0805 Case Size, Ceramic 22F,20%,X5R,6.3V,0805 Case Size, Ceramic 4.7H, 0.91A, 170m, H=1mm, L=2.8mm, W=3.0mm 3.3H, 1.99A, 39m, H=2mm, L=6.2mm, W=6.3mm 10.0, 1/16W, 1%, 0402 Case Size 100, 1/10W, 5%, 0603 Case Size See AnyVoltage Programming Table 1/16W, 1%, 0402 Case Size De sc r i pt io n 1MHz, Dual (1.5A/2.0A) Step-Down Regulator 0.1F,10%,X7R,16V,0603 Case Size, Ceramic 22F,20%,X5R,6.3V,0805 Case Size, Ceramic 22F,20%,X5R,6.3V,0805 Case Size, Ceramic 3.3H, 1.99A, 39m, H=2mm, L=6.2mm, W=6.3mm 2.0H, 2.47A, 24m, H=2mm, L=6.2mm, W=6.3mm 10.0, 1/16W, 1%, 0402 Case Size 100, 1/10W, 5%, 0603 Case Size
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Applications Information
PC Board Layout Considerations and Guidelines
Table 15: BOM for 88PG82XX
Ite m 9 Ite m 1 2 3 4 5 6 7 8 Ite m 1 2 3 4 5 6 7 8 Q t y. 4 Q t y. 1 1 2 2 2 1 3 4 Q t y. 1 1 2 2 2 1 3 4 R ef . R5,R6, R7,R8 R ef . U1 C1 C2,C5 C3,C4 L1,L2 R1 R2,R3, R4 R5,R6, R7,R8 R ef . U1 C1 C2,C5 C3,C4 L1,L2 R1 R2,R3, R4 R5,R6, R7,R8 M a n u f a ct ur e r P a r t # 88PG8237 ECJ-1VB1C104K C2012X5R0J226MT C2012X5R0J226MT A918CY-2R0M=P3 ERJ-2RKF10R0X ERJ-3GEYJ104V M a n u f a ct ur e r P a r t # 88PG8226 ECJ-1VB1C104K C2012X5R0J226MT C2012X5R0J226MT A918CY-3R3M=P3 ERJ-2RKF10R0X ERJ-3GEYJ104V M a n u f a ct ur e r P a r t # M an u fa ctu r e r Pansonic - ECG M an u fa ctu r e r Marvell Semiconductor Pansonic - ECG TDK TDK Toko Pansonic - ECG Pansonic - ECG Pansonic - ECG M an u fa ctu r e r Marvell Semiconductor Pansonic - ECG TDK TDK Toko Pansonic - ECG Pansonic - ECG Pansonic - ECG De sc r i pt io n See AnyVoltage Programming Table 1/16W, 1%, 0402 Case Size De sc r i pt io n 1MHz, Dual (1.5A/1.5A) Step-Down Regulator 0.1F, 10%, X7R, 16V, 0603 Case Size, Ceramic 22F, 20%, X5R, 6.3V, 0805 Case Size, Ceramic 22F, 20%, X5R, 6.3V, 0805 Case Size, Ceramic 3.3H, 1.99A, 39m, H=2mm, L=6.2mm, W=6.3mm 10.0, 1/16W, 1%, 0402 Case Size 100, 1/10W, 5%, 0603 Case Size See AnyVoltage Programming Table 1/16W, 1%, 0402 Case Size De sc r i pt io n 1MHz, Dual (2.0A/2.0A) Step-Down Regulator 0.1F, 10%, X7R, 16V, 0603 Case Size, Ceramic 22F, 20%, X5R, 6.3V, 0805 Case Size, Ceramic 22F, 20%, X5R, 6.3V, 0805 Case Size, Ceramic 2.0H, 2.47A, 24m, H=2mm, L=6.2mm, W=6.3mm 10.0, 1/16W, 1%, 0402 Case Size 100, 1/10W, 5%, 0603 Case Size See AnyVoltage Programming Table 1/16W, 1%, 0402 Case Size
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Doc. No. MV-S103563-00 Rev. C Page 53
88PG82XX Datasheet
Table 16: Ceramic Capacitor Cross Reference
Manufacturer Taiyo-Yuden TDK Murata Taiyo-Yuden TDK Murata Taiyo-Yuden TDK M a n u fa c tu r e r Pa r t # CE JMK212BJ226MG-T C2012X5R0J226MT GRM21BR60J226ME39L CE JMK212BJ106MG-T C2012X5R0J106MT GRM219R60J106KE190 RM LMK105BJ104KV-F C1005X5R1A104K 0.1F 10F D e s c r i p t io n 22F
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Mechanical Drawing
88PG82XX Mechanical Drawing
7
7.1
Mechanical Drawing
88PG82XX Mechanical Drawing
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88PG82XX Datasheet
7.2
Dimensions
Table 17: Package Dimensions
S y m b ol MIN A A1 A3 b D E e L R aaa bbb ccc ddd
Notes: 1. CONTROLLING DIMENSION: MILLIMETER 2. SPECIAL CHARACTERISTICS C CLASS: ccc
D im e n s io n i n m m NOM 0.85 0.02 0.20 REF 0.20 0.25 3.00 BSC 4.00 BSC 0.50 BSC 0.45 0.10 0.15 0.10 0.10 0.05 0.50 0.55 0.30 MAX 1.00 0.05
0.80 0.00
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Mechanical Drawing
Typical Pad Layout Dimensions
7.3
7.3.1
Typical Pad Layout Dimensions
Recommeded Solder Pad Layout
Package Outline
0.50 3.00 4.30
0.65
0.25
4x3 QFN-20 Land Pattern (mm)
0.25 mm 9.84 mils
Pad SM Pad SM
0.25 mm 9.84 mils
Pad
0.051 mm 2.0 mils
0.148 mm 5.84 mils
QFN Lead with Non-Solder Mask Defined Terminal (Not to Scale)
Notes: 1. TOP VIEW 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE IN MILLIMETERS 4. OVERSIZE SOLDER MASK BY 4 MILS OVER PAD SIZE (2 MIL ANNULAR RING) 5. 0.148mm SOLDER MASK (SM) BETWEEN PADS 6. TOLERANCE 0.05mm
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88PG82XX Datasheet
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Ordering Information
Ordering Part Numbers and Package Markings
8
8.1
Ordering Information
Ordering Part Numbers and Package Markings
Figure 50 shows the ordering part numbering scheme for the 88PG82XX devices. Contact Marvell(R) FAEs or sales representatives for complete ordering information.
Figure 50: Sample Part Number
88PG82XX XX - XXX 1 C000 - T
Part Number
88PG8204 88PG8216 88PG8226 88PG8227 88PG8237
Custom (Optional)
Custom Code
Custom Code Environmental Package Code
NFE = 20-pin QFN 1 = RoHS 6/6 compliant "-" = RoHS 5/6 compliant
8.2
Sample Ordering Part Number
The standard ordering part numbers for the respective solutions are as follows:
Table 18: 88PG82XX Ordering Part Numbers1
B o o k in g P a r t Number 88PG8204A0-NFE1C000 88PG8216A1-NFE1C000 88PG8226A1-NFE1C000 88PG8227A1-NFE1C000 88PG8237A1-NFE1C000
1. Contact Marvell for details. 2. Specifications over the -40C to 85C operating temperature range are assured by design, characterization and correlation with statistical process controls. 3. Package dimensions are in mm.
Marking V OUT 1 G204 G216 G226 G227 G237 0.75A 1.0A 1.5A 1.5A 2.0A
Current V O U T2 0.75A 1.5A 1.5A 2.0A 2.0A
Ambient Te m p er a t u r e Range2 -40 C to 85 C -40 C to 85 C -40 C to 85 C -40 C to 85 C -40 C to 85 C
Package3
3 X 4 QFN-20 3 X 4 QFN-20 3 X 4 QFN-20 3 X 4 QFN-20 3 X 4 QFN-20
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Doc. No. MV-S103563-00 Rev. C Page 59
88PG82XX Datasheet
8.3
8.3.1
Package Marking
88PG82XX Package Marking and Pin 1 Locations
Figure 51 is an example of the package marking and pin 1 location for the 88PG847 part. Markings for the other variants are similar.
Figure 51: 88PG8227 Package Marking and Pin 1 Location
MRVL G227
M arv el l Se m ic on d u ct or
Marking
YWW#
Year, Work week, Assembly code Y WW # Pin 1 location = Last digit of year = Work week = Assembly code
Note: The above example is not drawn to scale. Locations of markings are approximate.
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A
Release * * * *
Revision History
Table 19: Revision History
D o c u m e n t Ty p e D o c u m en t R ev i s io n Rev. C
Document brought into new template. "Confidential" removed. Functional Characteristic Graphs edited. Replaced Mechanical Drawing
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Doc. No. MV-S103563-00 Rev. C Page 61
Back Cover
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